Personal computers (PCs) have undergone evolutionary changes since the original models based on the Intel 8088 microprocessor, such as the International Business Machine Corporation (IBM) PC and other IBM-compatible machines. As the popularity of PCs have grown, so has the demand for more advanced features and increased capability and speed,
to the development of such higher order microprocessors as the Intel 20286, 30386, 40486, and more recently, the Pentium.
In response to the above demands, in addition to a desire to make PCs more "user-friendly," IBM introduced the Personal System/2 (PS/2) family of personal computers, which are based on a different type of architecture, referred to as the Micro Channel Architecture, or MCA, than IBM's "Family I" systems, which utilize the Industry Standard Architecture, or ISA. One major change introduced by IBM in the shift from the ISA to the MCA was the specification of Programmable Option Select, or POS, registers, which eliminate the need to configure an expansion board by setting jumpers and DIP switches by handling all configuration through software. Configuration data is stored in POS register space of each expansion board in CMOS memory and in an Adapter Description File, or ADFs, associated with the expansion board and stored on the boot disk. The operating system of the PCI automatically loads the stored configuration data into each expansion board each time the PC is booted, and also ensures the integrity of the configuration data.
The PC is configured using setup cycles to transfer adapter ID and adapter configuration data between the system master, or CPU, and the adapters. The system configuration procedure is similar to any basic data transfer except that an adapter is selected by an active CDSETUP signal, a valid POS register address is driven on the address bus; however, only bits A(2-0) are decoded by the adapter, and all configuration data transfers are one byte (i.e., eight-bit) transfers which occur on bits D(0-7) of the data bus.
During system setup, only one expansion slot is selected at a time by asserting that slot's CDSETUP line, which is driven by system logic to individually select one of the eight expansion slots of the PC into which adapter cards may be inserted. Each expansion slot has a dedicated CDSETUP line, providing an independent CDSETUP signal for each slot. When a particular slot's CDSETUP line is activated, if an adapter card is present, access is gained to the adapter's POS registers, in which are stored the ID number and configuration data of the adapter.
POS operations are keyed to adapter ID numbers, which are unique designations assigned to each model of adapter for the MCA and every MCA adapter card must be assigned such a number. Once an adapter card has been selected, it is queried for its adapter ID number, which is compared with a value stored in CMOS memory assigned to the expansion slot. If the two numbers match, the boot disk is searched for an ADF of the adapter, which contains configuration data for configuring the adapter. If the ID number read from the adapter card does not match the ID number stored in CMOS or if the adapter's ADF is not found, an error results and a system configuration utility must be run again. Otherwise, configuration data is read from the ADF and used to initialize the adapter's POS registers.
MCA provides eight POS registers numbered 0-7. Data transfers to and from the POS registers is accomplished in a manner similar to any basic data transfer function, except that, when a valid POS register address is driven on the address bus only lines A(2-0) of the address bus are decoded by the adapter to determine which of the eight POS registers is being addressed. The following Table I shows the organization of the address space used for POS operations:
TABLE 1 ______________________________________ ADDRESS FUNCTION ______________________________________ XXX0h POS Register 0 - Adapter ID Byte (low byte) XXX1h POS Register 1 - Adapter ID Byte (high byte) XXX2h POS Register 2 - Option Select Data Byte 1 (Bit 0 is designated as Card Enable) XXX3h POS Register 3 - Option Select Data Byte 2 XXX4h POS Register 4 - Option Select Data Byte 3 XXX5h POS Register 5 - Option Select Data Byte 4 (Bit 7 is designated as channel check) (Bit 6 is designated as channel-check-status indicator) XXX6h POS Register 6 - Subaddress Extension (low byte) XXX7h Register 7 - Subaddress Extension (high byte) ______________________________________
In addition to the eight POS registers, MCA provides a mechanism for accessing up to 128 KB of additional POS register space, referred to as extended POS (XPOS). XPOS registers are accessed during the setup sequence by writing a two byte value to POS registers 7 (high byte) and 6 (low byte), which value is then used as an index to an XPOS register for all setup-cycle accesses to POS registers 3 and 4. For example, if 0001h is written to POS registers 7 and 6, access to XPOS register 0001h may be had through POS register 4. Additional information on IBM's MCA can be obtained by referring to a publication entitled "Personal System/2 Model 80 Technical Reference," published April, 1987 by IBM Corp., Armonk, N.Y.
More recently, an alternative to the MCA, referred to as the "Peripheral Component Interconnect," or PCI, bus has been developed as a physical interconnect mechanism intended for use between highly integrated peripheral controller components and processor/memory systems. Like MCA adapters, PCI compliant devices must be initialized and configured and, similar to the MCA, PCI provides for totally software driven initialization and configuration via a separate configuration address space. Unlike MCA, however, PCI comprises 256 bytes of configuration space, or 256 configuration registers, as opposed to 8 bytes of POS space and 128 KB of XPOS space. Additionally, PCI devices are selected during configuration through use of an IDSEL signal, similar to the CDSETUP signal of the MCA, which is provided each device on the PCI bus, with selection of a particular device being performed by driving one of the 24 most significant AD(31-0) lines high while the IDSEL line is active.
The selected PCI device responds to the CPU with a DEVSEL# signal. Addressing of the 256-byte register space of the selected device may then be performed using the AD(7-2) lines. Additional details concerning the protocol, electrical and mechanical feature of the PCI bus are set forth in the publication entitled "PCI Specification Revision 2.0--Review Draft Mar. 9, 1993" published by the PCI Special Interest Group, Hillsboro, Oreg.
It may be desirable in certain instances to provide a basic adapter card with additional functionality not originally included on the adapter card itself due to various reasons such as cost or size constraints on the card. Typically, such additional functionality will be a matter of a user's personal choice. For example, a basic display adapter typically will not include the necessarily circuitry and logic for implementing Joint Photographic Experts Group (JPEG) or Motion Picture Experts Group (MPEG) image compression algorithms, as many users would have no need for such functionality and would not be willing to pay for it to be included on their display adapters. Other users, while they do not initially see the need for such additional functionality, may later see a need for it, but will not want to be forced to buy a new display adapter to obtain it. Alternatively, a user may need to be able to use the algorithms interchangeably.
A solution to the above situation is to include the additional functionality, such as circuitry and logic for performing MPEG and JPEG, on an extension card, herein referred to as a "daughter card," which is removably connectable to the adapter card itself. In this manner, a user may purchase a basic adapter card and then select the additional functions he or she would like to have the capability to perform.
A problem which arises in connection with the above-described use of the daughter card lies in the fact that, because it appears that the PCI bus is fast becoming the new industry standard, it may be desirable to design daughter cards and the components residing thereon to be PCI-compliant, so that they may be moved to the planar, or motherboard, of a PC having a PCI local bus without requiring additional modification to the circuitry thereof. However, most existing PCs, and thus, most available adapter cards, are MCA- or ISA-, rather than PCI-, compliant. Therefore, a problem exists as to how to initialize and configure a PCI daughter card residing on an MCA adapter card using MCA signals, setup cycles and protocols to do so.
Another problem which arises in connection with the use of daughter cards is that of enabling RAM and/or ROM of a daughter card to be accessed, or addressed, by the other devices of the PC. During configuration of the PC, a memory manager of the host polls each adapter card inserted in an expansion slot to determine the amount of memory space required thereby. The memory manager will then allocate to each card the requested amount of space in blocks of 8 KB, not to exceed a total of 16 KB of memory space per card. However, because the host, and thus the memory manager, will not be aware of the existence of any daughter cards residing on one or more of the adapter cards, memory space will not be allocated thereto. As a result, any RAM and/or ROM residing on a daughter card is rendered inaccessible.
Therefore, what is needed is a technique for configuring a PCI daughter card using MCA configuration cycles and signals and a technique for ensuring that memory space is allocated to a daughter card residing on an adapter card during system boot-up.